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Swaminadhan Rajula

Assistant Professor (Sr. Gd.), Electronics and Communication Engineering, School of Engineering, Bengaluru

Qualification: M.Tech.
r_swaminadhan@blr.amrita.edu
Research Interest: Machine Learning based DSP and VLSI architectures, Machine learning on FPGA’s, Digital system design, Hardware libraries based on Machine learning for DSP applications

Bio Publications Experience Courses Taught Student Guidance
Bio

Swaminadhan R. currently serves as Assistant Professor (Sr. Gd.) at the department of Electronics and Communication, Amrita School of Engineering, Banglore campus. He is pursuing his Ph.D.

Education

  • Year: Ph.D (pursuing) in …VLSI Domain
    From: Amrita Vishwa Vidyapeetham
  • Year: M. Tech. in  Microelectronics and VLSI Design, 2011
    From: …NIT Calicut…
  • Year: B. Tech: Electronics and Communication Engineering, 2007
    From: …Narayana Engineering College, Nellore.
Publications

Conference Proceedings

Year : 2020

Power Efficient Router Architecture for Scalable NoC

Cite this Research Publication : N. Varghese and Swaminadhan R., “Power Efficient Router Architecture for Scalable NoC”, Innovations in Electronics and Communication Engineering. Springer Singapore, Singapore, 2020.

Publisher : Innovations in Electronics and Communication Engineering

Year : 2019

High Speed Low Power Radix 4 Approximate Booth Multiplier

Cite this Research Publication : N. Rose Varghese and Swaminadhan R., “High Speed Low Power Radix 4 Approximate Booth Multiplier”, 2019 3rd International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech). IEEE, Kolkata, India, 2019.

Publisher : 2019 3rd International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech)

Year : 2018

Implementation and Design of optimized FIR filter using Radix-2r

Cite this Research Publication : S. D Vishnu, Sowjanya, D. V., P Reddy, N., and Swaminadhan R., “Implementation and Design of optimized FIR filter using Radix-2r”, 3rd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) . 2018.

Publisher : 3rd IEEE International Conference on Recent Trends in Electronics, Information Communication Technology (RTEICT)

Journal Article

Year : 2019

Design of FIR Filter Architecture for Fixed and Reconfigurable Applications using Highly Efficient Carry Select Adder

Cite this Research Publication : S. Shah, Swaminadhan R., G.R., M. Reddy, V.S., R., and V.K., P., “Design of FIR filter architecture for fixed and reconfigurable applications using highly efficient carry select adder”, Advances in Intelligent Systems and Computing, vol. 898, pp. 627-637, 2019.

Publisher : International Conference on Soft Computing and Signal Processing (ICSCSP-2018)

Conference Paper

Year : 2018

An Efficient FIR Filter Architecture using 4:2 Compressor

Cite this Research Publication : S. Bodapati and Swaminadhan R., “An Efficient FIR Filter Architecture using 4:2 Compressor”, in International Conference on Intelligent Computing (ICIC) 2018, Amrita School of Engineering, Bengaluru, 2018.

Publisher : International Conference on Intelligent Computing (ICIC) 2018

Experience

Total Work Experience :  10 Years 8 months

Teaching : 10 Years 8 months

Research : 4 Years

Courses Taught
  • Network Theory/Circuit Theory
  • Electronic Circuits-I & II
  • VLSI Design
  • Applied Electromagnetics
  • Transmission Lines and radiating systems
  • Control systems engineering
Student Guidance

Undergraduate Students

Sl. No Name of the Student(s) Topic Status – Ongoing/Completed Year of Completion
1 Parakoti Venkata
Naga Sai Ganesh
Medipally Shiva
Rohith Reddy
Meruva Revanth Sai Kumar		 Design of Power and Area Efficient Approximate Multiplier Ongoing 2021
2 P. GEETHESWAR
PRASHANTH

Y. VEERENDRA SAI

Palukuri Sumanth

 VEHICLE DETECTION AND TRAFFIC DENSITY CONTROLLING USING ARTIFICIAL NEURAL NETWORKS Ongoing 2021
3 P.CH SRI RAMA SESHU
P SAI KIRAN
S.SANDEEP		 DESIGN AND IMPLEMENTATION OF 128 X 128 BIT MULTIPLIER BY VEDIC MATHEMATICS Ongoing 2021
4 GG CHOWDARY
P.Mukesh Satya Krishna
V.CH.SATYA PRAKASH		 CONVERSION OF IMAGE TO TEXT AND SPEECH Completed 2020
5 M.AMULYA
K. THANUSHREE		 EFFICIENCY OF S-BOX
IN BLOCK CIPHERS		 Completed 2020
6 Devireddy Sravya
Eppiti Rishita Reddy
G.Venkata Abhiram3		 CONGESTION CONTROL AND COLLISION AVOIDANCE IN VEHICULAR AREA NETWORKS Completed 2019
7 G.V. Amaranath Reddy,
G. Navya Sree,
J. N. S. Sarvani		 Implementation of Efficient AES Algorithm in FPGA
Architecture		 Completed 2019
8 D. S. Vishnu
D. V. Sowjanya
P. N. Reddy		 Design of optimized FIR filter using Radix-2r Completed 2018
9 Santhoshkumar S D, Samineni Akhil,

Sushanth Alapati

 Modified Standard Basis Encoding And Decoding Technique Using Multiplexer Completed 2018

Postgraduate students

Sl. No Name of the Student(s) Topic Status – Ongoing/Completed Year of Completion
1 Duggi Niveditha Implementation of Low Area ALU using Reversible Logic Formulations Completed 2020
2 Gopika Reji Optimized Concurrent Error Detectable Adder Completed 2020
3 Nivya Varghese Power Efficient Router Architecture for Scalable NoC Completed 2019
4 Nivya Varghese High Speed Low Power Radix 4 Approximate Booth Multiplier Completed 2019
5 Saurav Shah Design of FIR Filter Architecture for Fixed and Reconfigurable Applications Using Highly Efficient Carry Select Adder Completed 2019
6 Boddapati Sainath An Efficient FIR Filter Architecture using 4:2 Compressors Completed 2019
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