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Publications
Design of interactive paging and locating device for GPS applications

Citation : Muraleedharan Anjana, Bhakthavatchalu Ramesh "Design of interactive paging and locating device for G ...

Publisher :Elsevier

Publications
Hamming 3 algorithm for improving the reliability of SRAM based FPGAs

Citation : Bhakthavatchalu, Ramesh, Sooraj S " Hamming 3 algorithm for improving the reliability of SRAM based ...

Publisher :Elsevier

Publications
Design of reconfigurable LFSR for VLSI IC testing in ASIC and FPGA

Citation : Devika K.N, Bhakthavatchalu, Ramesh "Design of reconfigurable LFSR for VLSI IC testing in ASIC and F ...

Publisher :Elsevier

Publications
UVM based testbench architecture for logic sub-system verification

Citation : Pavithran T.M, Bhakthavatchalu Ramesh "UVM based testbench architecture for logic sub-system verific ...

Publisher :Elsevier

Publications
Fault tolerant FSM on FPGA using SEC-DED code algorithm

Citation : Sooraj S, Manasy M, Bhakthavatchalu, Ramesh "Fault tolerant FSM on FPGA using SEC-DED code algorithm ...

Publisher :Elsevier

Publications
FPGA based delay PUF implementation for security applications

Citation : Bhakthavatchalu Ramesh, Kumar, Mahin Anil, " FPGA based delay PUF implementation for security applic ...

Publisher :Elsevier

Publications
Computational Drug Discovery – A Primer

Citation : N. Sukumar, Harishchander Anandaram and Pratiti Bhadra, "Computational Drug Discovery – A Primer" ...

Publisher :Ion Cures Press

Publications
Low latency max log map based turbo decoder

Citation : Narayanan, Aswathy, Murugan, Senthil, Bhakthavatchalu, Ramesh "Low latency max log map based turbo d ...

Publisher :Elsevier

Publications
Parameterizable FPGA implementation of SHA-256 using blockchain concept

Citation : Bhakthavatchalu, Ramesh,Devika K.N "Parameterizable FPGA implementation of SHA-256 using blockchain ...

Publisher :Elsevier

Publications
Block Level SoC Verification Using Systemverilog

Citation : Yadu, Krishnan K, Bhakthavatchalu, Ramesh "Block Level SoC Verification Using Systemverilog",Proceed ...

Publisher :Elsevier

Publications
Comparative Study of Test Pattern Generation Systems to Reduce Test Application Time

Citation : Dilip, Patare Snehal, Somanathan, Geethu Remadevi, Bhakthavatchalu, Ramesh, " Comparative Study of T ...

Publisher :Elsevier

Publications
Design and Synthesis of Novel Co-Initiators via Base Catalysed Sequential Conjugate Reaction: Application in Photoinduced Radical Polymerisation Reaction

Citation : Asrar Ahmad, Shakir Ali Siddiqui, Garvisha Mittal, N. Sukumar, Kshatresh Dutta Dubey, Ajoy Kapat, "D ...

Publisher :Chemistry: A European Journal

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