Course

1. For the given bias current, obtain the output and transfer characteristics of a typical 90 nm NMOS device. Determine the effect of varying (i) Drain voltage, (ii) Gate voltage, (iii) Body bias voltage and (iv) Aspect ratio. Repeat for PMOS device
2. Experimentally determine transconductance gain, threshold voltage, overdrive voltage, Early voltage, small signal input-output resistance and voltage gain of the given device for the specified bias point. Based on this, determine (i) Large-signal equivalent, (ii) Small signal equivalent, (iii) High frequency equivalent of the device and (iv)Transit frequency.
3. Construct a common-source amplifier with resistive load by setting the bias point mentioned in Expt. No.1. Based on this, (i) Observe its dc simulation, ac simulation and transient analysis, (ii) Determine the mid-band gain, 3-dB frequency, Gain-bandwidth product, and phase angle from the relevant magnitude and phase plots, (iii) Replace the resistive load by appropriate active load and observe parameters as mentioned in (i) and (ii). Note: Active loads may be current source, diode-connected and/or push-pull types
4. Construct an active load differential amplifier by setting the bias point mentioned in Expt. No.1. Based on this, (i)Determine its common-mode gain and differential gain and compute its CMRR and (ii) Observe its linearity and analyze its performance trade-off.
5. Simulation of a PN junction diode to (i) obtain its structure, (ii) obtain diode characteristics, (iii) view contour plots and (iv) extract key device parameters through cutline analysis.
6. Simulation of a BJT to (i) generate the device structure, (ii) study collector current characteristics, (iii) view contour plots and (iv) extract key device parameters through cutline analysis.
7. Simulation of a MOSFET to (i) generate the structure, (ii) analyze drain current for varying drain voltages, (iii) view contour plots and (iv) extract key device parameters through cutline analysis.
8. Simulation of an SOI MOSFET to (i) simulate the device structure, (ii) examine transfer characteristics, (iii) view contour plots, (iv) extract parameters of short channel effects like Vth, DIBL, Subthreshold slope, ION, IOFF, and ION/ IOFF and (v) extract key device parameters through cutline analysis.
9. Simulation of an SOI Junctionless FET to (i) obtain the structure, (ii) evaluate drain current behavior, (iii) view contour plots, (iv) extract parameters of short channel effects like Vth, DIBL, Subthreshold slope, ION, IOFF, and ION/ IOFF and (v) extract key device parameters through cutline analysis.

• To understand MOS characteristics and to design and analysis of active loaded amplifiers in nanometer CMOS technology
• To understand device operation and characteristics through hands-on experiments.
• To simulate and analyze semiconductor devices like diodes, BJTs, MOSFETs, and Junctionless FETs.

At the end of the course, the student should be able to

• CO1: Ability to understand MOS characteristics and to design current sources
• CO2: Ability to apply techniques to design actively loaded amplifiers
• CO3: Simulate and analyze the electrical characteristics of semiconductor devices.
• CO4: Interpret device behavior and performance metrics under various design and biasing conditions.

Skills Acquired: This lab provides a platform to design and analyze CMOS-based active loaded amplifiers with the help of industry standard tools. Moreover, students will acquire skills for simulating and analyzing semiconductor devices such as diodes, BJTs, MOSFETs, and Junctionless FETs. This helps them to interpret device behavior, evaluate performance metrics, and apply semiconductor physics concepts in virtual device design and provides way for optimization.

CO-PO Mapping:

1. Razavi, Design of Analog CMOS Integrated Circuits, Tata McGraw Hill, 2002, Reprint 2015.
2. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, Third Edition, Oxford Press, 2011.
3. A Sedra, K. C. Smith and A. N. Chandorkar, Microelectronic Circuits -Theory and Applications, Seventh Edition, Oxford University Press, 2017.
4. K. Sarkar, Technology Computer Aided Design Simulation for VLSI MOSFET, 1st Edition, CRC Press, 2013.
5. Silvaco Inc., Atlas User’s Manual, Device Simulation Software, 2018.