Course

Unit 1:

Importance of Low Power Consumption – Design for Low Power – Deep Submicron and Nanometer MOS Transistors and Models – Sources of Static and Dynamic Power Consumption in MOS Devices – New Device Technologies for Reducing Leakage Current – Basics of Power and Energy.

Unit 2:

Power Optimization During Design Cycle – Architecture – Algorithm and System Levels Power Optimization of Interconnects and Clocks – Dynamic Voltage Scaling – Clock Distribution – RTL Power Estimation and Optimization – Model Granularity – Model Parameters – Model Semantics – Model Storage and Model Construction.

Unit 3:

Power Optimization in Memories – Power in Cell Arrays – Power for Read and Write Accesses – Low Power Memory Technologies – Standby Power Optimization of Circuits and Systems – Power Optimization of Circuits and Systems During Operation – Low Power Design Methodologies and Flows – Power Characterization and Modeling – Low Power Clock – Data and Power Gating.

Course Objectives

• To provide a comprehensive idea about different sources of power dissipation in VLSI circuits.
• To introduce the different power estimation and optimization methods.
• To apply low power techniques at all levels of the design cycle.

Course Outcomes: At the end of the course, the student should be able to +

• CO1 Ability to understand the concepts of low power VLSI circuits.
• CO2 Ability to apply various architectures for low power implementations.
• CO3 Ability to analyse the various power optimization techniques.
• CO4 Ability to evaluate the power dissipation in VLSI circuits.

Skills Acquired:
Provide an understanding to analyse the different low power architectures

CO-PO Mapping:

1. Jan M. Rabaey, Low Power Design Essentials, Springer, 2009.
2. Christian Piguet, Low-Power CMOS Circuits: Technology, Logic Design and CAD Tools, CRC Press, Taylor and Francis, 2006.
3. Rakesh Chadha and J. Bhaskar, An ASIC Low Power Primer, Analysis, Techniques and Specification, Springer, 2013.
4. Michael Keating, David Flynn, Robert Aitken, Alan Gibbons and Kaijian Shi, Low power Methodology Manual for System on Chip, Springer, 2007.
5. Kaushik Roy and S.C. Prasad, Low power CMOS VLSI circuit design, Wiley, 2000.