Course

Unit 1:

Introduction to Reconfigurable Computing – Mask-programmed to field-programmable; Suitability for parallel processing; Domain-specific acceleration- General Purpose Processors (GPP), ASICs, FPGAs; Fixed vs adaptive hardware; Comparison with GPUs and DSPs- Fine-grain (bit-level, LUTs) vs coarse-grain (word-level, ALUs); Granularity impact on power, speed, area; Reconfigurable datapaths.

Unit 2:

Basic FPGA Architecture- Configuration Technologies- Overview of Xilinx, Intel (Altera), Lattice, Microsemi; FPGA families: Spartan, Artix, Kintex, Virtex, Zynq, Cyclone, Stratix; Real-world board-level examples- Configuration Methods- JTAG, Slave/Passive Serial, SelectMAP, SPI; Configuration bitstream structure; Concept of Partial Reconfiguration (PR): spatial, temporal- Traditional FPGA Design Flow – Placement and Routing – Simulation and Verification– Emerging Trends in reconfigurable architectures

Unit 3:

High-Level Synthesis (HLS)- Loop pipelining and latency constraints – Hardware/Software Co-design- Task partitioning basics; Memory-mapped I/O communication; Integration with soft/hard processors- Introduction to AXI interface; Use of standard IPs (FIFO, memory controllers); IP packaging; Xilinx IP Integrator/Qsys overview – Soft-core Processors on FPGA – SoC and MPSoC FPGA Platforms – Partial and Dynamic Reconfiguration – Reconfigurable Computing Applications and case studies

Course Objectives

• Understanding the principles of reconfigurable architectures
• Designing and implementing systems on reconfigurable hardware like FPGAs.
• Exploring applications that benefit from dynamic hardware reconfiguration

Course Outcomes: At the end of the course, the student should be able to

• CO1: Understand fundamental concepts and the evolution of reconfigurable architectures.
• CO2: Analyse various FPGA architectures and tools.
• CO3: Apply high-level synthesis and hardware/software co-design methodologies.
• CO4: Design reconfigurable systems for real-world applications and evaluate trade-offs.

Skills Acquired: in-depth knowledge in various reconfigurable architectures
CO-PO Mapping:

1. Scott Hauck and André DeHon, Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation, Morgan Kaufmann, 2007.
2. Frank Vahid, Digital Design with RTL Design, VHDL, and Verilog, Wiley, 2010.
3. Clive Maxfield, The Design Warrior’s Guide to FPGAs, Newnes, 2004.
4. Wayne Wolf, FPGA-Based System Design, Prentice Hall, 2004.
5. Hubertus Franke et al., High-Performance Reconfigurable Computing, Springer, 2021.
6. Vendor docs: Xilinx Vivado/Vitis, Intel Quartus Prime, ARM Cortex integration guides.