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Publication Type : Conference Proceedings
Publisher : ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology
Source : ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology, Volume 1, Kanyakumari, p.350-354 (2011)
ISBN : 9781424486779
Keywords : Area overhead, Benchmark circuit, Characteristic polynomials, Exhaustive tests, Fault coverages, LFSR, Linear feedback shift registers, Pattern Generation, Phase shift, Random pattern, seed selection, Shift registers, Test pattern generator
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Verified : Yes
Year : 2011
Abstract : Pattern generation is the most important module in a BIST. Out of many test pattern generators (TPG) explored for BIST, linear feedback shift registers (LFSR) are widely used due to their ability to produce highly random patterns. Various improvements over the basic forms of LFSR are available. In the current study, the selection of an appropriate LFSR for a given benchmark circuit is analyzed. It is done by considering various factors such as selection of characteristic polynomial and seed to obtain high fault coverage, minimize invalid patterns, area overhead and time taken to generate the patterns. © 2011 IEEE.
Cite this Research Publication : Na Haridas and Dr. Nirmala Devi M., “Efficient linear feedback shift register design for pseudo exhaustive test generation in BIST”, ICECT 2011 - 2011 3rd International Conference on Electronics Computer Technology, vol. 1. Kanyakumari, pp. 350-354, 2011.