Course

Unit 1

Introduction to Digital Signal Processing Systems – Iteration Bound – Pipelining and Parallel
Processing – Retiming – Unfolding – Folding – Systolic Architecture Design.

Unit 2

Fast Convolution – Algorithmic strength reduction – Pipelined and Parallel Recursive and Adaptive Filters – Scaling and Round off Noise – Digital Lattice Filter Structures.

Unit 3

Bit-Level Arithmetic Architectures – Redundant Arithmetic –Numeric Strength Reduction – Low-Power Design – Case studies of algorithm to architecture mapping -performance – complexity trade-offs.

Course Objectives

• To introduce the concepts of DSP architecture design.
• To provide an understanding of the techniques needed for the implementation of DSP architectures.
• To emphasize the realization of DSP architectures with high throughput, less area and less power.
• To provide an understanding of the concepts of high performance VLSI system design.

Course Outcomes: At the end of the course, the student should be able to

• CO1: Understand the various VLSI architectures for digital signal processing Algorithms.         
• CO2: Apply and analyze techniques of high level architectural transformation for designing DSP algorithms.
• CO3: Apply and analyze the algorithmic transformation techniques for designing DSP algorithms.       
• CO4: Evaluate architectures for adders, multipliers and digital filters.

Skills Acquired:  Provides skill needed for the usage of design methodologies for the realization of VLSI architectures for signal processing algorithms.

CO-PO Mapping: