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Design and Comparative Analysis of CMOS

Publication Type : Conference Proceedings

Publisher : IEEE

Url : https://doi.org/10.1109/icSmartGrid66138.2025.11071839

Keywords : Embedded systems;Digital signal processing;Very large scale integration;Logic gates;Energy efficiency;Power dissipation;Transistors;Internet of Things;Adders;Thermal stability;Ripple Carry Adder;MGDI;FS-GDI;CMOS;Low Power;VLSI;Embedded Systems;Transistor Optimization

Campus : Coimbatore

School : School of Engineering

Department : Electrical and Electronics

Year : 2025

Abstract : Ripple Carry Adder (RCA) design optimization is essential in order to achieve power efficient Very LargeScale Integration (VLSI) applications. Traditional RCA in Complementary Metal Oxide Semiconductor (CMOS) technology has large transistor count, poor power dissipation, lengthy propagation in delay, and is generally not very well suited to today's lower power products. In this study, CMOS based RCA is compared with Full Swing Gate Diffusion Input (FS-GDI) and Modified Gate Diffusion Input (MGDI) on the basis of the most efficient design. Simulation results show that MGDI based RCA has lowest power consumption (1.484 W), reduced delay and balanced transistor usage compared to CMOS as well as FS GDI. The study shows that the MGDIbased RCA is the most energy efficient approach and it is a good fit for mobile, embedded, and IoT domains with a need of low power operation and high-performance computing.

Cite this Research Publication : Manoj N, Neric Joel A, Rithish J, Prathik Ram V, Saisuriyaa G, Design and Comparative Analysis of CMOS, [source], IEEE, 2025, https://doi.org/10.1109/icSmartGrid66138.2025.11071839

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