| Course Name | Digital Signal Processors and Applications |
| Course Code | 15ECE327 |
| Program | B. Tech. in Electronics and Communication Engineering |
| Year Taught | 2019 |
Programmable architecture: Review of digital signal processing concepts – Basic architectural features – DSP communicational building blocks – Bus architecture and memory data addressing capabilities – Address generation unit – Programmability and program execution – Speed issues – Features for external interfacing.
Programmable digital signal processors: Commercial digital signal processing devices – Data addressing modes of TMS320C54XX digital signal processors – Data addressing modes of TMS320C54XX processors – Memory space of TMS320C54XX processors – Memory space of TMS320C54XX processors – Program control – TMS320C54XX instruction & programming – On-chip peripherals – Pipeline operation of TMS320C54XX processors.
Implementation of basic DSP algorithms: The Q notation – FIR filters – IIR filters interpolation of filters. Decimation filters – Adaptive filters – 2-D signal processing – FFT algorithm for DFT computation – Butterfly computation overflow and scaling – Bit reversed index generation FFT implementation on the TMS320C54XX – Computation of signal spectrum. Advanced DSPs: Overview of TMS320C67X processor: Architecture – pipelining – Applications of programmable DSP devices to speech/image processing.
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