Course

Unit 1:

Introduction – On-Chip Vs. Off-Chip Networks – On-Chip Network Building Blocks.
Interface with System Architecture – Shared Memory Networks in Chip Multiprocessors – Synthesized Nocs in MPSoCs. Topology – Direct Topologies – Indirect Topologies – Irregular Topologies. Routing Algorithms – Types – Oblivious Routing – Adaptive Routing – Source Routing – Node Table-Based Routing – Routing on Irregular Topologies.

Unit 2:

Flow Control – Message-based Flow Control – Packet-based Flow Control – Flit-based Flow Control – Flow Control Implementation in MPSoCs – Router Microarchitecture – Pipeline – Buffer Organization – Allocators and Arbiters – Architecture Design of Network-On-Chip – Wormhole Router Architecture Design – Adaptive Router Architecture Design.

Unit 3:

Evaluation of Network-On-Chip Architectures – Traffic Modeling – Localized Traffic – Reconfigurable Network-On-Chip Design – Local Reconfiguration Approach – Topology Reconfiguration – Link Reconfiguration – Three-Dimensional Integration of Network-on-Chip – Opportunities and Challenges of 3D Integration – Design and Evaluation of 3D NoC Architecture – Future Trends – Photonic NoC – Wireless NoC.

Course Objectives

• To provide basic concepts of NoC design by introducing the topologies, router design and MPSoC styles.
• To introduce sample routing architectures with evaluation and routing algorithm on a
• To provide knowledge of the functions of reconfigurable NoC.
• To introduce 3D NoCs and its future trends.

Course Outcomes: At the end of the course, the student should be able to

• CO1: Ability to understand the need for NoC, architectures, reconfiguration NoCs.
• CO2: Ability to understand routing algorithms and flow control mechanisms.
• CO3: Ability to analyze and design aspects of NoC architectures and reconfiguration techniques.
• CO4: Ability to analyze and design aspects of NoC routing algorithms and flow control mechanisms.

CO-PO Mapping

Skills Acquired: Design aspects of NoC topologies, routing algorithms and reconfigurable NoCs.

1. Santanu Kundu, Santanu Chattopadhyay, Network-on-Chip: The Next Generation of System-on-Chip Integration, CRC Press, 2018.
2. Enright Jerger and L-S. Peh, On-Chip Networks, Synthesis Lectures on Computer Architecture, Morgan & Claypool, 2009.
3. Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch, Designing 2D and 3D Network on Chip Architecture, Springer, 2013.
4. A Jantsch and Tenhunen, Networks on Chip, Kluwer Academic Publishers, 2003.