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Publication Type : Journal Article
Publisher : World Scientific Pub Co Pte Ltd
Source : Journal of Circuits, Systems and Computers
Url : https://doi.org/10.1142/s0218126625500689
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2024
Abstract : Quantum-dot cellular automata (QCA) technology is one of the nanotechnologies which attracted a great deal of consideration because of features like the speed of the circuit, low-power utilization and small size. In digital electronics, the comparator plays a vital role, due to its vast area of applications like state machine design, digital testing and fault tolerance, digital control systems, etc. This paper proposes a 4-bit/8-bit/16-bit comparator in QCA technology using the XOR Gate. The proposed method is an efficient method, which has two stages: finding whether the inputs are equal or not in stage 1 and less than or greater than in stage 2 using an XOR gate. The proposed comparator circuits have less area and cost with less delay as compared to the previous works. The proposed energy calculations are carried out with the QCA DesignerE tool, and it is observed that the proposed structures are energy efficient. In addition, the proposed comparators are simulated and synthesized with Vivado design suite 2021.1 and implemented on the Virtex UltraScale VCU129-PP FPGA board.
Cite this Research Publication : Patthi Aruna, Gurumurthy Komanapalli, An Efficient, Scalable, Regular 4/8/16-Bit Comparator in Quantum-Dot Cellular Automata (QCA) Technology Using XOR Gates, Journal of Circuits, Systems and Computers, World Scientific Pub Co Pte Ltd, 2024, https://doi.org/10.1142/s0218126625500689