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Publication Type : Journal Article
Publisher : Elsevier BV
Source : Microelectronics Journal
Url : https://doi.org/10.1016/j.mejo.2021.105267
Keywords : VIP, SS, DMG, SCE, TGF
Campus : Amritapuri
School : School of Computing
Department : Computer Science and Engineering
Year : 2021
Abstract : Multiple Fins structured FinFET (M-FinFET) is a promising semiconductor device for future advancement of CMOS technology. In this paper, a new GaAs based M-FinFET structure is introduced that exhibits superior performance compared to other exiting FinFET structures. Here, a comprehensive study of device characteristics with stress analysis of the proposed device structure is explored for the first time. Besides that, various electrical characteristics of device physics like electron density, electron velocity, and electron mobility are studied to relate the output performance. Various important device electrical attributes like ION, threshold voltage, sub-threshold swing, switching ratio, and major RF/analog parameters are evaluated and analyzed for various gate lengths in the presence/absence of stress effect. Result shows that the introduction of stress in M-FinFET enhanced the ION by 159.2%, device efficiency (TGF) gets improved by 49.36%, and intrinsic gain (Av) by 17.23% which would be very useful for low power application. Furthermore, several important linearity attributes are explored with stress effect.
Cite this Research Publication : Rinku Rani Das, Santanu Maity, Atanu Chowdhury, Apurba Chakraborty, RF/Analog performance of GaAs Multi-Fin FinFET with stress effect, Microelectronics Journal, Elsevier BV, 2021, https://doi.org/10.1016/j.mejo.2021.105267