Unit 1:
Introduction to Electronic System Level Design–Design Space Exploration – Hybrid Design – ESLD Flows and Methodologies – Architecture Exploration–Hardware-software Partitioning.
Course Name | Electronic System Level Design |
Course Code | 25VL735 |
Program | M. Tech. in VLSI Design |
Credits | 3 |
Campus | Amritapuri, Coimbatore, Bengaluru, Chennai |
Introduction to Electronic System Level Design–Design Space Exploration – Hybrid Design – ESLD Flows and Methodologies – Architecture Exploration–Hardware-software Partitioning.
Models for ESL Design– Open-Source Language–SpecC (basic idea), System C –Transaction Level Modelling- Building Platform Models- High Level Synthesis-– Power Evaluation –– Virtual Platform and Virtual Prototyping.
Functional Models- High Level verification- Formal solution- Debugging Platform Models Case study: Bluespec and Accellera initiatives on test and stimulus standards- Property Specification Language.
Course Objectives
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Course Outcomes: At the end of the course, the student should be able to
Skills Acquired: System level modelling and verification
CO-PO Mapping:
CO/PO | PO 1 | PO 2 | PO 3 | PSO1 | PSO2 | PSO3 |
CO 1 | 3 | 3 | 2 | |||
CO 2 | 3 | 3 | 3 | 2 | ||
CO 3 | 3 | 3 | 3 | 2 | ||
CO 4 | 3 | 3 | 3 | 2 |
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