Course

Unit 1:

Need of SOC testing – Basics of SOC- SOC Design Example – Scan Architectures – Logic Built-In-Self-Test – Aspects of SOC Testing – Modular – Wrapper –TAM-Scheduling – Modular – Wafer Sort and pre-burn-in test

Unit 2:

Introduction to FPGA Testing – FPGA architectures, FPGA Testing – Methods of Testing – Built-In-Self-Test of Resources – Testing – Embedded process, FPGA testing challenges.

Unit 3:

Modeling of Electrical parameter – Power issues – Low power scan testing – Low power BIST – Low power RAM Test – Built In Logic block observer – Design – SOC testing – PNX8550 – Case Studies

Course Objectives

• To introduce the modules of System-on-chip.
• To impart knowledge on the FPGA Architecture.
• To comprehend the testing process on architectures.

Course Outcomes: At the end of the course, the student should be able to

• CO1: Ability to comprehend the concept of System-on-chip.
• CO2: Ability to apply testing process on System-on-chip testing.
• CO3: Ability to analyze the challenges in FPGA architectures and FPGA Testing.
• CO4: Ability to design for testability and built-in test architectures.

Skills Acquired: Knowledge on System on Chip (SOC) Testing and FPGA Testing.

CO-PO Mapping:

1. L-T Wang, C. E. Stroud, & N. A. Touba, Editors, System-on-chip Test architectures Nanometer design for testability, Morgan Kaufmann Publishers, imprint of Elsevier, 2008.
2. Parag K. Lala, An Introduction to Logic Circuit Testing, Morgan & Claypool Publishers, 2009.
3. Cheng-Wen Wu, Chih-Tsun Huang, Essential Issues in SOC Design, Youn- Long Steve Lin, Editors, Soc Testing and Design for Testability pp 265-310, 2006.