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Integrating Verilog Simulation with Python Automation: A ModelSim and Colab Framework for FPGA Design and Analysis

Publication Type : Journal Article

Publisher : IEEE

Source : 2025 8th International Conference on Circuit, Power & Computing Technologies (ICCPCT)

Url : https://doi.org/10.1109/iccpct65132.2025.11176607

Campus : Amritapuri

School : School of Engineering

Center : Humanitarian Technology (HuT) Labs

Department : Electronics and Communication

Year : 2025

Abstract : Field-Programmable Gate Arrays (FPGAs) are pivotal in modern hardware development, offering a flexible and efficient platform for implementing digital systems. Traditional workflows for FPGA simulation and verification, however, tend to be resource-intensive and lack adequate automation. This paper proposes an advanced framework that integrates Verilog-based FPGA simulations with Python-driven automation, leveraging ModelSim and Google Colab. By utilizing Python’s scripting capabilities, the framework streamlines the creation of testbenches, automates simulation processes, and facilitates comprehensive post-simulation analysis. The scalable nature of this approach reduces the time and effort needed for debugging and performance evaluation. Through various case studies involving FPGA modules, the framework’s effectiveness and efficiency are highlighted, showcasing its potential to enhance development cycles and improve design precision. This integration equips researchers and engineers with a powerful and user-friendly toolkit for optimizing hardware development workflows.

Cite this Research Publication : V Kasinathan, Rajesh Kannan Megalingam, Integrating Verilog Simulation with Python Automation: A ModelSim and Colab Framework for FPGA Design and Analysis, 2025 8th International Conference on Circuit, Power & Computing Technologies (ICCPCT), IEEE, 2025, https://doi.org/10.1109/iccpct65132.2025.11176607

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