Course

Unit I

Fundamental concepts: Register transfers, fetching a word from memory, Storing a word in memory. Execution of a complete instruction, Branch instructions, and A Complete processor.

Assembly language – Assembly language notation, Basic instruction types, Register Transfer Languages, Addressing modes, and subroutines.

Unit II

Memory Organization: Basic Concepts, Semiconductor RAMs, Read-Only Memories, Performance Analysis of memory Cache memory: Types of cache memory, Mapping functions, Replacement algorithms

Virtual memory: Address Translation, Secondary storage.

Unit III

Introduction to I/O Operations, Peripheral devices, and Input/output interfaces. Modes of transfer: Programmed I/O, Interrupt initiated I/O, Direct Memory access.

Unit IV

Parallel Processing, Introduction to pipelining: Instruction pipelining and Arithmetic pipelining. Hazards: Data hazards, Instruction hazards, Handling data hazards, and instruction hazards.

Embedded Systems: Examples of embedded systems

Course Objective(s)

• Explore the architecture of modern processors, including the design of the central processing unit (CPU). 
• Acquire knowledge about different types of memory systems, including cache memory, and main memory (RAM). 
• Implement the phases involved in executing an instruction. 
• Illustrate concepts related to parallel processing and pipeline design, including superscalar and vector architectures. 

Course Outcomes

CO-PO Mapping 

Textbooks 

• Carl Hamacher, Zvonks Vranesic, Safea Zaky (2002), Computer Organization, 5th edition, McGraw Hill, New Delhi, India. 
• M Morris Mano, Computer System Architecture (3rd Edition) 

References 

• William Stallings (2010), Computer Organization and Architecture- designing for performance, 8th edition, Prentice Hall, New Jersey. 
• Andrew S. Tanenbaum (2006), Structured Computer Organization, 5th edition, Pearson Education Inc. 3. John P. Hayes (1998), Computer Architecture and Organization, 3rd edition, Tata McGraw Hill.