Course

Introduction to FPGAs – Design flow – Circuit Fabrics – LUTs and IO Blocks – FPGA Technology overview – Digital Design for FPGAs – High Level System Architecture and Specification: Behavioural modelling and simulation – Hardware description languages – Design of combinational and sequential subsystems – Case Study of RTL Design for FPGAs – Interpreting Synthesis and Implementation reports
Design of data path and controller subsystems – FIFOs – Memory controllers – Platform FPGAs – DSP blocks – FPGA Block RAMs – Synthesis issues – System Level synthesis from high level languages
Block-based design flow – Case study of block-based design of a digital system – FPGA processor fabrics and bus interfaces – FPGA based embedded design flow.

Pre-requisite: Nil

Course Objectives: 

• Understand FPGA architecture and design flow, including logic implementation (LUTs, I/O blocks), HDL-based modelling, and synthesis of combinational/sequential systems.

Course Outcomes: 

• CO1: Understand synthesizable HDL modelling of digital subsystems. 
• CO2: Formulate architecture of systems at the RTL abstraction.  
• CO3: Implement digital systems in FPGA platforms and evaluate them based on tool reports.  
• CO4: Employ custom and block design to realize embedded systems for FPGA implementation.  

CO-PO Mapping: 

1. Michael D. Ciletti, “Advanced Digital Design with Verilog HDL”, Second Edition, Pearson Higher Education, 2011. 
2. Stephen Brown and Zvonko Vranesic, “Fundamental of Digital Logic with VHDL Design”, Third Edition, McGraw Hill, 2009. 
3. Samir Palnitkar, “Verilog HDL, A Guide to Digital Design and Synthesis”, Second Edition, Pearson Education, 2003. 
4. R. Padmanabhan and B. Bala Tripura Sundari, “Design Through Verilog HDL”, Wiley Interscience, 2004.
5. Wayne Wolf, “FPGA-Based System Design”, Prentice Hall India Pvt. Ltd., 2005.