Publication Type : Conference Paper
Publisher : IEEE
Source : 2024 5th International Conference on Smart Electronics and Communication (ICOSEC)
Url : https://doi.org/10.1109/icosec61587.2024.10722101
Year : 2024
Abstract : With ever-advancing microprocessor technology and System-on-Chip (SoC) architectures, it is required to effectively interface and connect the high-speed devices on the board/chip along with the relatively low-speed and low-frequency components. This is where on-chip interconnects come into the picture with the ARM-based AMBA bus systems. While the AMBA protocol is further divided into multiple types of sub-protocols optimized for high or low speed peripherals, this work will solely focus on the Advanced Peripheral Bus (APB) Protocol. This paper aims to provide a comprehensive survey of some of the notable research and works that have been done to design and verify this protocol, utilizing a spectrum of different tools and methodologies. This survey looks at previous works where different DUTs are used as slave for the APB interface (DAC/ADC and Inter-Integrated Circuits), and where assertion, code-based and functional coverage have been obtained, with a maximum of 100 and 97 percent functional and code coverage respectively.
Cite this Research Publication : Dhanush P. Kumar, Kirti S. Pande, A Study on Verification of APB Protocol, 2024 5th International Conference on Smart Electronics and Communication (ICOSEC), IEEE, 2024, https://doi.org/10.1109/icosec61587.2024.10722101