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Course Detail

Course Name Advanced Computer Architecture
Course Code 15CSE332
Program B. Tech. in Computer Science and Engineering
Year Taught 2019


Unit 1

Instruction Level Parallelism: ILP – Concepts and challenges – Hardware and software approaches – Dynamic scheduling – Speculation – Compiler techniques for exposing ILP– Branch prediction. VLIW & EPIC – Advanced compiler support – Hardware support for exposing parallelism – Hardware versus software speculation mechanisms – IA 64and Itanium processors – Limits on ILP, Data-Level Parallelism in Vector, SIMD, and GPU Architectures: Introduction – vector architecture – working – performance – SIMD Instruction Set Extensions for Multimedia – Graphics Processing units – GPGPU.

Unit 2

Multiprocessors and Thread level Parallelism: Symmetric and distributed shared memory architectures – Performance issues – Synchronization – Models of memory consistency – Introduction to Multithreading Memory and I/O: Cache performance – Reducing cache miss penalty and miss rate – Reducing hit time – Main memory and performance – Memory technology. Types of storage devices – Buses – RAID – Reliability, availability and dependability – I/O performance measures – Designing an I/O system.

Unit 3

Multi-Core Architectures: Software and hardware multithreading – SMT and CMP architectures – Design issues – Case studies – Intel Multi-core architecture – SUN CMP architecture – heterogeneous multi-core processors – case study: IBM Cell Processor.

Text Books

  • John L. Hennessey and David A. Patterson, “Computer architecture – A Quantitative approach”, Morgan Kaufmann / Elsevier Publishers, Fifth edition, 2012.


  • David E. Culler and Jaswinder Pal Singh, “Parallel computing architecture: A hardware / software approach”, Morgan Kaufmann, Elsevier Publishers, 1999.
  • Kai Hwang and Zhi.Wei Xu, “Scalable Parallel Computing”, Tata McGraw Hill, New Delhi, 2003.

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