Publications

Abstract : A Graphene FET(GFET) based on computational closed form expressions termed as compact model using quasi ballistic approach for circuit simulation is developed. The Verilog - A dual gated GFET model is developed for a channel length of 90 nm and a width of 1 μm and is found to have a better equivalent current and a higher Ion/Ioff ratio has been attained than the single gated model. It demonstrates the effect of body bias on the conductivity characteristics, as shown by the shift of the Dirac point. Also the frequency characterization of the model is obtained and verified by development of frequency multiplier circuits - doubler; the performance has been compared to have maintained in terms of spectral purity but having a better output amplitude validating the DC characteristics of the dual gated VS model used in the doubler circuit.