Publication Type : Journal Article
Publisher : IEEE
Source : 2025 IEEE International Conference on Contemporary Computing and Communications (InC4)
Url : https://doi.org/10.1109/inc465408.2025.11256474
Campus : Chennai
School : School of Computing
Department : Computer Science and Engineering
Year : 2025
Abstract : With the development of electronic products, highly reliable, small, and highly efficient electronic devices are required. Printed Circuit Boards are an inevitable part in such devices, playing a crucial role in ensuring both reliability and performance. Spurious copper, open circuitry, and omitted holes in PCBs will seriously affect the functionality, safety, and service life of electronic products; thus, defect detection in PCBs is an essential link in its production process. This paper improves PCB fault detection by comparing state-of-the-art single-stage and two-stage deep learning models comprising YOLOv10, SSD, and Faster R-CNN. To enhance the potential for defect identification of these models, several attention processes such as CBAM, ViT, and SENet are integrated into the research. These models will be tested using various classes of defects based on the precision, recall and mean average precision-mAP metrics. The results reflect the advantages and disadvantages of the different designs, while Faster R-CNN combined with SENet has shown the best balance between accuracy and computational efficiency. This work will help identify appropriate deep learning architectures and attention methods that meet specific needs for PCB defect detection tasks.
Cite this Research Publication : Viksith Bardia, Vidhun Roshan, M Prabu, Evaluation of Deep Learning Architectures for PCB Defect Detection in One-Stage and Two-Stage Models, 2025 IEEE International Conference on Contemporary Computing and Communications (InC4), IEEE, 2025, https://doi.org/10.1109/inc465408.2025.11256474