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GaN Power Electronics Switching Device Characterization

Project Incharge:Dr. K. Deepa
Funded by:Industry Funded Project

Dept/Center/Lab: Autonomous E-Mobility Centre, Department of Electrical & Electronics Engineering

School: School of Engineering , Bangalore

GaN Power Electronics Switching Device Characterization

Has received Industry funded project of ₹8 lakhs  for a duration July 2025 – February 2026

Project Members

  • Dr. K. Deepa (Project Investigator)
  • Mr. Sreerama Divya Prakash (JRF)
  • Mr. Sai Chaitanya Ikkurti (JRF)
  • Ms. Priyaa Vaishnavi H. S. (Member)
  • Ms. Sowmithra R. U. (Member)

Objective:

The primary objective of this project is to comprehensively characterize the static and dynamic performance of Gallium Nitride (GaN) High-Electron-Mobility Transistors (HEMTs). Unlike traditional Silicon-based devices, GaN offers superior switching speeds and breakdown voltages. This research aims to validate these parameters under real-world operating conditions, focusing on switching loss analysis, gate-drive optimization, and thermal stability to enable the design of ultra-high-density power converters.

Origin of Proposal Idea:

As the power electronics industry transitions from Silicon (Si) to Wide Bandgap (WBG) materials, there is a critical need to understand the practical implementation challenges of GaN devices. While theoretical datasheets promise high efficiency, practical issues such as electromagnetic interference (EMI), gate ringing, and thermal management at high frequencies remain “open research problems.” This proposal originates from the industry’s requirement to validate GaN devices in hard-switching topologies to replace bulky silicon IGBTs/MOSFETs in next-generation chargers and inverters.

Deliverables / Approach:

The project focuses on building a dedicated characterization test-bed. Key deliverables include:

  • Gate Driver Optimization: Designing custom gate drive circuits to prevent false triggering and ensure reliable high-speed switching (>100  kHz).
  • Efficiency Mapping: Comparative analysis of GaN vs. Si devices in standard DC-DC converter topologies to quantify efficiency gains.
  • Thermal Profiling: Characterization of device junction temperatures under varying load conditions to establish safe operating areas (SOA).

Amount: ₹8 Lakhs

Duration: July 2025 – February 2026

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