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An FPGA based low cost receiver for ultrasonic anemometer

Publication Type : Conference Paper

Publisher : Elsevier

Source : 2016 International Conference on Control Instrumentation Communication and Computational Technologies, ICCICCT 2016

Url : https://www.scopus.com/record/display.uri?eid=2-s2.0-85028651395&origin=resultslist&sort=plf-f

Campus : Amritapuri

School : School of Engineering

Department : Electronics and Communication

Year : 2016

Abstract : This paper introduces a low cost receiver for wind velocity measurement using FPGA with multiple ultrasonic transceivers. Wind speed is derived from the time taken by ultrasonic sound to travel between an ultrasonic transmitter and receiver. The receiver section of ultrasonic anemometer acquires the data for time of flight calculation from transmitter section and wind velocity is calculated. Ultrasonic anemometer is more advantageous over mechanical or other type of anemometers. The existing ultrasonic system for three dimensional wind velocity measurement is highly expensive. The proposed system can achieve an accuracy of 0.05m/s at a lower cost. Simulations are done in Xilinx ISE. For the hardware implementation, Xilinx Spartan 3E FPGA board is used.

Cite this Research Publication : Chandran, Reshma, Kumar, P. Pradeep, Bhakthavatchalu, Ramesh, "An FPGA based low cost receiver for ultrasonic anemometer " , 2016 International Conference on Control Instrumentation Communication and Computational Technologies, ICCICCT 2016

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