ProgramsView all programs
From the news
- Chancellor Amma Addresses the Parliament of World’s Religions
- Amrita Students Qualify for the European Mars Rover Challenge
Publication Type : Journal Article
Publisher : Advances in Intelligent Systems and Computing
Source : Advances in Intelligent Systems and Computing, Springer Verlag, Volume 898, p.447-452 (2019)
ISBN : 9789811333927
Keywords : Automatic test pattern generator, Benchmark circuit, Computation theory, Computer circuits, Detection tests, diagnostic tests, Electric fault location, Failure analysis, Location, Logic circuits, Signal processing, Soft computing, Test coverage, Test sets, Test vectors, Timing circuits
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Year : 2019
Abstract : The proposed work aims at generating a diagnostic test set which is a compact test set derived from a large set of test vectors generated from any automatic test pattern generator (ATPG). This diagnostic test set is required to find out the exact location of the faults. The patterns generated from the ATPG may be sufficient to find out whether the circuit is fault free or not, but will not give the location of the fault. Hence, the proposed method aims at identifying the exact location of the faults. The experiment has been carried out on several ISCAS’85 and ISCAS’89 benchmark circuits. © Springer Nature Singapore Pte Ltd. 2019.
Cite this Research Publication : B. Madhan and Anita, J. P., “Improving diagnostic test coverage from detection test set for logic circuits”, Advances in Intelligent Systems and Computing, vol. 898, pp. 447-452, 2019.