Publication Type : Conference Paper
Publisher : ymposium on VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018
Source : VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018, PES Institute of Technology, Bengaluru, South Campus, India, 2018.
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2018
Abstract :
Cite this Research Publication : S. S. and P. Sathish Kumar, “Low power and area efficient error tolerant design for parallel filters”, in ymposium on VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018, PES Institute of Technology, Bengaluru, South Campus, India, 2018.