Publication

Abstract : With the advent of VLSI, very complex circuits can be implemented in a single chip. So the need for testing the chip increases with the integration. Fault diagnosis results in improving the circuit design process, the manufacturing yield, cost of testing and also reduces the time to market. Diagnosis of today's complex faults is a challenging problem due to the explosion of the underlying solution space with the increasing number of fault locations. This paper gives a comprehensive framework for logic diagnosis of multiple arbitrary faults that can occur in combinational digital circuits. This approach employs the effect cause analysis for the fault diagnosis. To demonstrate the applicability of the proposed method stuck at faults ,bridging faults, open-interconnect fault, stuck open faults, delay faults and a combination of these faults in the same circuit simultaneously leading to multiple faults are dealt with. © 2011 IEEE.