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Publications
Design and Implementation of MIPI I3C master controller SubSystems

Authors : Yadhu Krishnan S, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Implementing delay based physically unclonable functions on FPGA

Authors : Kiran, N.H.N. Sai, Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
An FPGA based low cost receiver for ultrasonic anemometer

Authors : Chandran, Reshma, Kumar, P. Pradeep, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Design and implementation of izhikevich spiking neuron model on FPGA

Authors : Murali Shanmukha, Kumar, Juneeth, Kumar Jayanth, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Programmable MISR modules for logic BIST based VLSI testing

Authors : Devika K.N., Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Time of flight measurement system for an ultrasonic anemometer

Authors : Chandran, Pooja, Kumar P. Pradeep, Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Design of efficient programmable test-per-scan logic BIST modules

Authors : Devika K.N., Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
UVM based testbench architecture for logic sub-system verification

Authors : Pavithran T.M, Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Hamming 3 algorithm for improving the reliability of SRAM based FPGAs

Authors : Sooraj S, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Design of interactive paging and locating device for GPS applications

Authors : Muraleedharan, Anjana, Bhakthavatchalu, Ramesh

Publisher : Elsevier

Publications
Design of reconfigurable LFSR for VLSI IC testing in ASIC and FPGA

Authors : Devika K.N., Bhakthavatchalu Ramesh

Publisher : Elsevier

Publications
Low latency max log map based turbo decoder

Authors : Narayanan, Aswathy, Murugan, Senthil, Bhakthavatchalu, Ramesh

Publisher : Elsevier

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