Back close

Anu Chalil

Asst. Professor

Anu Chalil currently serves as an Assistant Professor at the Department of Electronics and Communication Engineering at Amrita School of Engineering, Amritapuri.

Qualification: B-Tech, M.Tech
anuchalil@am.amrita.edu
Research Interest: Digital Design, FPGA Architecture, FPGA Implementation, Low Power VLSI Design, Subthreshold FPGA

Bio

Anu Chalil currently serves as an Assistant Professor (Sr.Grade) at the Department of Electronics and Communication Engineering at Amrita School of Engineering, Amritapuri.

Anu Chalil obtained MTech in VLSI from Amrita Vishwa Vidyapeetham, Ettimadai Campus in 2009. She has completed her BTech from Mahatma Gandhi University College of Engineering, Thodupuzha in 2006. She is currently pursuing her PhD in Subthreshold FPGA Architecture at Amrita School of Engineering, Bangalore Campus. She has received fellowships for International VLSI Conference (VLSID) in 2017 and 2019. She has more than 10 years of teaching experience.

Publications

Conference Paper

Performance analysis of montgomery multiplier

Authors : Anu Chalil

Publisher : 2017 2nd International Conference on Communication and Electronics Systems

Implementation of power estimation methodology for intellectual property at SoC level

Authors : Anu Chalil

Publisher : 2017 2nd International Conference on Communication and Electronics Systems (ICCES)

FPGA based ToF measurement system for ultrasonic anemometer

Authors : Anu Chalil, P. Chandran, Pradeepkumar, P

Publisher : 2017 2nd International Conference on Communication and Electronics Systems (ICCES)

Publicly Verifiable Digital Watermarking Technique for Copyright Property Protection

Authors : Anu Chalil, J. Joseph, Dath, G. G.

Publisher : 2018 3rd International Conference on Communication and Electronics Systems

FPGA Implementation of Physical Layer Data Encoding Schemes

Authors : Anu Chalil, G. Dath

Publisher : 2018 Second International Conference on Inventive Communication and Computational Technologies (ICICCT), 2018

Performance Analysis of 6T SRAM Cell on Planar and FinFET Technology

Authors : Anu Chalil, A. A. Kumar

Publisher : 2019 International Conference on Communication and Signal Processing (ICCSP)

VLSI Implementation of Turbo Coder for LTE using Verilog HDL

Authors : Anu Chalil, Sreehari K. N., V. Akshaya

Publisher : 2020 Fourth International Conference on Computing Methodologies and Communication

Performance Evaluation of LUTs in FPGA in Different Circuit Topologies

Authors : Anu Chalil, Sreehari K. N., N. Vinod, Neelakandan, K. A., Udith, R., K. Devadas, S., Dinesh, K.

Publisher : 2020 International Conference on Communication and Signal Processing

Journal Article

Performance Evaluation Based on Placement Planning of Logic Blocks in FPGA Design

Authors : Anu Chalil, J. Joseph

Publisher : 2018 International Conference on Wireless Communications,

Admissions Apply Now