Year : 2025
In-Memory Computation using Asymmetrical Schmitt Trigger SRAM cell
Cite this Research Publication : Daksh Dobhal, Kanugula Sneha, Navaneet Anilkumar, Kirti S. Pande, In-Memory Computation using Asymmetrical Schmitt Trigger SRAM cell, 2025 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS), IEEE, 2025, https://doi.org/10.1109/sceecs64059.2025.10940658
Publisher : IEEE
Year : 2025
Delay-Optimized High-Speed Dynamic Comparator with Temperature Compensation
Cite this Research Publication : Pala Lakshman Sai, V Surya Prathik, M Roopa Rajan, Kirti S. Pande, Delay-Optimized High-Speed Dynamic Comparator with Temperature Compensation, 2025 8th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech), IEEE, 2025, https://doi.org/10.1109/iementech65115.2025.10959548
Publisher : IEEE
Year : 2025
Saferoute: Multi-Modal Optimization for Crisis Management and Evacuation
Cite this Research Publication : Sumanth Ponugupati, Teja Sai Yallamelli, Phanidhar Chilukuri, Kamatchi S, Kirti S Pande, Saferoute: Multi-Modal Optimization for Crisis Management and Evacuation, 2025 3rd International Conference on Smart Systems for applications in Electrical Sciences (ICSSES), IEEE, 2025, https://doi.org/10.1109/icsses64899.2025.11009902
Publisher : IEEE
Year : 2024
HBM3 Architectural Specific Checks and Timing Closure
Cite this Research Publication : R Bharath, Kirti S. Pande, HBM3 Architectural Specific Checks and Timing Closure, 2024 5th International Conference on Smart Electronics and Communication (ICOSEC), IEEE, 2024, https://doi.org/10.1109/icosec61587.2024.10722076
Publisher : IEEE
Year : 2024
Dual Phased-Write 7T SRAM Cell
Cite this Research Publication : A Madhumitha, Kirti S. Pande, Dual Phased-Write 7T SRAM Cell, 2024 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), IEEE, 2024, https://doi.org/10.1109/discover62353.2024.10750671
Publisher : IEEE
Year : 2024
A Study on Verification of APB Protocol
Cite this Research Publication : Dhanush P. Kumar, Kirti S. Pande, A Study on Verification of APB Protocol, 2024 5th International Conference on Smart Electronics and Communication (ICOSEC), IEEE, 2024, https://doi.org/10.1109/icosec61587.2024.10722101
Publisher : IEEE
Year : 2024
Design Conversion of GPDK 180nm to GPDK 45nm
Cite this Research Publication : Harsha Vardhan Y, Kirti S. Pande, Design Conversion of GPDK 180nm to GPDK 45nm, 2024 9th International Conference on Communication and Electronics Systems (ICCES), IEEE, 2024, https://doi.org/10.1109/icces63552.2024.10859670
Publisher : IEEE
Year : 2024
A Verilog based Approach for Object Detection using CNN
Cite this Research Publication : Samson Swaraj Quadros, S. Adityakrishna, Kirti S. Pande, A Verilog based Approach for Object Detection using CNN, 2024 5th IEEE Global Conference for Advancement in Technology (GCAT), IEEE, 2024, https://doi.org/10.1109/gcat62922.2024.10923868
Publisher : IEEE
Year : 2024
Current Mirror based Level Shifter aiding multitudinous conversion ranges
Cite this Research Publication : P. Lahari Kiran, K. S. Pratheek, Sathvika M, Kirti S. Pande, Current Mirror based Level Shifter aiding multitudinous conversion ranges, 2024 International Conference on Integrated Circuits and Communication Systems (ICICACS), IEEE, 2024, https://doi.org/10.1109/icicacs60521.2024.10498652
Publisher : IEEE
Year : 2024
Comparison of Approximate Multipliers for Optimized Power and Area
Cite this Research Publication : Y Harsha Vardhan, A Madhumitha, Dhanush P Kumar, Kirti S. Pande, Comparison of Approximate Multipliers for Optimized Power and Area, 2024 First International Conference on Innovations in Communications, Electrical and Computer Engineering (ICICEC), IEEE, 2024, https://doi.org/10.1109/icicec62498.2024.10808963
Publisher : IEEE
Year : 2023
Test Pattern Generation in BIST Architecture Using One-Hot Encoding
Cite this Research Publication : Noopura Parvathi A, Kirti S. Pande, Nizampatnam Neelima, Test Pattern Generation in BIST Architecture Using One-Hot Encoding, 2023 4th International Conference on Smart Electronics and Communication (ICOSEC), IEEE, 2023, https://doi.org/10.1109/icosec58147.2023.10276237
Publisher : IEEE
Year : 2023
Robust Body Biased Level Shifter
Cite this Research Publication : Lahari Kiran P, Kambam Sirisha, Vasavi Nuthalapati, Kirti S. Pande, Robust Body Biased Level Shifter, 2023 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), IEEE, 2023, https://doi.org/10.1109/discover58830.2023.10316666
Publisher : IEEE
Year : 2023
Approximate Multiplier for Optimized Power and Delay
Cite this Research Publication : Y. Harsha Vardhan, A. Madhumitha, Dhanush P. Kumar, Kirti S. Pande, S Kamatchi, Navin Kumar, Approximate Multiplier for Optimized Power and Delay, 2023 IEEE Asia Pacific Conference On Postgraduate Research In Microelectronics And Electronics (PRIMEAsia), IEEE, 2023, https://doi.org/10.1109/primeasia60757.2023.00026
Publisher : IEEE
Year : 2021
Electromigration and IR Voltage Drop Reduction Technique on DDR Memory Block Using Power Grid Augmentation
Cite this Research Publication : A. Marni and K. S. Pande, "Electromigration and IR Voltage Drop Reduction Technique on DDR Memory Block Using Power Grid Augmentation," 2021 5th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech), 2021
Publisher : IEMENTech
Year : 2021
Strong Single-Arm Latch Comparator with Reduced Power Consumption
Cite this Research Publication : G. Jithin, G. B. V. S. V. Prasad, J. V. N. S. Krishna and K. S. Pande, "Strong Single-Arm Latch Comparator with Reduced Power Consumption," 2021 Fourth International Conference on Electrical, Computer and Communication Technologies (ICECCT), 2021
Publisher : ICECCT
Year : 2021
MTCMOS 8T SRAM Cell with Improved Stability and Reduced Power Consumption
Cite this Research Publication : S. Anusha, B. S. Nikhil, K. S. Manoj and K. S. Pande, "MTCMOS 8T SRAM Cell with Improved Stability and Reduced Power Consumption," 2021 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), 2021
Publisher : IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)
Year : 2020
Speed Improvement in SRAM Cell Using Transmission Gates
Cite this Research Publication : P. Swetha, P Meghana, S., Charisma, J., and Pande, K. S., “Speed Improvement in SRAM Cell Using Transmission Gates”, in 2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), Udupi, India, 2020.
Publisher : 2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)
Year : 2020
Compressor Using Full Swing XOR Logic Gate
Cite this Research Publication : S. Harsha Bandarupalli, Bandi, B. Pavan Kaly, Boggula, R. Kumar Redd, and Pande, K. S., “Compressor Using Full Swing XOR Logic Gate”, in 2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER), Udupi, India, 2020.
Publisher : 2020 IEEE International Conference on Distributed Computing
Year : 2020
Error Detection and Correction Using RP SEC-DED
Cite this Research Publication : N. Farheen and Pande, K. S., “Error Detection and Correction Using RP SEC-DED”, in 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech), Kolkata, India, 2020.
Publisher : 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech)
Year : 2020
Low Power Rail to Rail D Flip-Flop Using Current Mode Logic Structure
Cite this Research Publication : S. Mutukuri and Pande, K. S., “Low Power Rail to Rail D Flip-Flop Using Current Mode Logic Structure”, in 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech), Kolkata, India, 2020.
Publisher : 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech)
Year : 2019
SQAC Using Folding-Merging Based Squarer
Cite this Research Publication : H. M., K., N., P., M., and Pande, K. S., “SQAC Using Folding-Merging Based Squarer”, in 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA), Coimbatore, India, 2019.
Publisher : 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA),
Year : 2019
Multiplier Using NAND Based Compressors
Cite this Research Publication : T. Satish and Pande, K. S., “Multiplier Using NAND Based Compressors”, in 2019 3rd International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech), Kolkata, India, 2019.
Publisher : 2019 3rd International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech)
Year : 2019
Critical Path Delay Improvement in Logic Circuit Operated at Subthreshold Region
Cite this Research Publication : L. Mohit Dhirubhai and Pande, K. S., “Critical Path Delay Improvement in Logic Circuit Operated at Subthreshold Region”, in 2019 International Conference on Communication and Electronics Systems (ICCES), Coimbatore, India, 2019.
Publisher : 2019 International Conference on Communication and Electronics Systems (ICCES)
Year : 2019
NMOS Only Schmitt Trigger Based SRAM Cell
Cite this Research Publication : R. Adithi, Dambal, S., and Pande, K. S., “NMOS Only Schmitt Trigger Based SRAM Cell”, in 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA), Coimbatore, India, 2019.
Publisher : 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA),
Year : 2018
All Digital Phase Locked Loop for Low Frequency Applications
Cite this Research Publication : P. R. Bissa and Pande, K. S., “All Digital Phase Locked Loop for Low Frequency Applications”, in 2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI), Bangalore, India, 2018.
Publisher : 2018 International Conference on Advances in Computing
Year : 2018
4-bit Counter using High-Speed Low-Voltage CML D-Flipflops
Cite this Research Publication :
Publisher : International Conference on Communication and Electronics Systems (ICCES) 2018
Year : 2017
Leakage Reduction in DT8T SRAM Cell Using Body Biasing Technique
Cite this Research Publication : R. Suthar, Pande, K. S., and Murty, N. S., “Leakage Reduction in DT8T SRAM Cell Using Body Biasing Technique”, in 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), Bhopal, India, 2017.
Publisher : 2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)
Year : 2016
Dual-threshold single-ended Schmitt-Trigger based SRAM cell
Cite this Research Publication : D. Sreenivasan, Purushothaman, D., Pande, K. S., and Dr. N.S. Murty, “Dual-threshold single-ended Schmitt-Trigger based SRAM cell”, in 2016 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC), 2016.
Publisher : 2016 IEEE International Conference on Computational Intelligence and Computing Research (ICCIC)
Year : 2015
Subthreshold voltage to supply voltage level shifter using modified revised wilson current mirror
Cite this Research Publication : J. Parimala, Priyanka, K., Kaumudi, L. S., Pande, K. S., and Dr. N.S. Murty, “Subthreshold voltage to supply voltage level shifter using modified revised wilson current mirror”, in 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015, 2015.
Publisher : 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015
Year : 2015
Stability investigation for 1R-2W and 2R-2W Register File SRAM bit cell using FinFET in subthreshold region
Cite this Research Publication : S. Mohan, Pande, K. S., and Dr. N.S. Murty, “Stability investigation for 1R-2W and 2R-2W Register File SRAM bit cell using FinFET in subthreshold region”, in 2015 International Conference on VLSI Systems, Architecture, Technology and Applications, VLSI-SATA 2015, 2015.
Publisher : 2015 International Conference on VLSI Systems, Architecture, Technology and Applications, VLSI-SATA 2015
Year : 2015
SRAM cell with improved stability and reduced leakage current for subthreshold region of operation
Cite this Research Publication : P. Sreelakshmi, Pande, K. S., and Dr. N.S. Murty, “SRAM cell with improved stability and reduced leakage current for subthreshold region of operation”, in 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015, 2015.
Publisher : 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015
Year : 2015
A memory architecture using linear and nonlinear feedback shift registers for data security
Cite this Research Publication : J. Jose, Pande, K. S., and Dr. N.S. Murty, “A memory architecture using linear and nonlinear feedback shift registers for data security”, in 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015, 2015.
Publisher : 2015 IEEE International Conference on Computational Intelligence and Computing Research, ICCIC 2015