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Amrita’s National Workshop on Electronic System Level Design and Verification Concludes

December 20, 2014 - 8:54
Amrita’s National Workshop on Electronic System Level Design and Verification Concludes

The Department of Electronics and Communication Engineering, Amrita School of Engineering, organized a two day National Workshop on ‘Electronic System Design & Verification (ESLD&V) 2014” from November 14-15, 2014. The event was sponsored by Accellera Pvt. Ltd. and Cadence Pvt. Ltd. and supported by Bluespec Pvt. Ltd.

The workshop was conducted under the guidance of organizing chair Dr. Shikha Tripathi, Professor and Chairperson, Department of Electronics and Communication Engineering and workshop chair Dr. N. S. Murty, Professor, Department of Electronics and Communication Engineering. Assistant Professors Mr. C. Babu and Ms. Kirti S. Pande were the coordinators of the workshop.

The objective of the workshop was to increase the awareness on ESLD&V in the VLSI and Embedded Systems communities, especially in academic circles. This workshop also aimed to encourage teaching ESL Design and Verification as a subject in undergraduate and postgraduate levels and promote research in related areas.

The workshop was needed because in India, ESLD&V is being practiced in industry, but the emphasis in academics on the same has been very limited. Bridging this gap is essential. This workshop was an attempt to provide and opportunity for the academicians and students to improve their familiarity with and increase their interest in the ESLD&V area. The forum that can be created through this workshop also can help promote research inputs from academics to industry.

The workshop offered key note addresses, guest lectures and panel discussions on various related topics by the experts from industry, as well as hands on sessions on ESL Design by expert from Bluespec Pvt. Ltd.

Dr. S. K. Nandy, Professor, SERC, Department of Electronic Systems Engineering, IISc., Bengaluru – Keynote address) ESLD&V – Shaping Futuristic Designs
Ms. Bhishnupriya Bhattacharya (Engineering Director, cadence Design Systems, Bengaluru – Invited Talk) ESL Shift Left : Moving to a Higher Level of Abstraction
Mr. Pradeep Salla (Technical Manager, FV & Emulation, Mentor Graphics, Bengaluru – Invited Talk) Innovative Virtual Prototype Technologies for Systems and Application Bring – Up
Prof. S. K. Nandy, Dr. Sandeep Pendharkar (AMD), Ms. Bhishnupriya Bhattacharya, Mr. Mallikarjuna B. S. (Mentor Graphics) and Mr. Srinivasan V. (CVC) Panel Discussion on “ Indian Academic Community – Time to Embark on to ESLD&V Journey”
Ms. Ajeetha Kumari (CEO, and MD, CVC, Bengaluru – Keynote Address) ESLD&V Methodologies, languages and Tools – Status and Outlook
Dr. Kanishka Lahiri (Senior Member of Technical Staff, AMD, Bengaluru – Invited Talk) System – Level Models for SoC Performance Analysis : Challenges and Opportunities
Mr. Arvinda Thimmapuram (Senior Staff Engineer, Intel, Bengaluru – Invited Talk) Early SW Development using ESL
Mr. Swaminathan Ramachandran (Architect of ESL Methodologies, Circuit Sutra, Bengaluru – Invited Talk) System C – Driver of ESL Methodology
Mr. Pragnajit Roy (Senior R&D Engineer, Synopsys, Bengaluru – Invited Talk) ESL: Trends, Challenges and Opportunities from EDA Perspective
Mr. Niraj Nayan Sharma (Head – India, Bluespec Inc. Bengaluru – Hands on Session) ESL Design Including Tarde-off  Using Bluespec Methodologies
Dr. Sandro Rigo (Professor, Computer Systems Laboratory, IC-UNICAMP, Campinas, Brazil – Invited Talk) ESL Design: Our Experience in Teaching and Research and Research at IC-Unicamp, Brazil

The feedback from participants was very encouraging and reflected that the workshop was effective. Eminent industry experts in the domain were able to interact with participants and the experts promised to continue the association further.

National Workshop on Electronic System Level Design and Verification

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