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Drainage Power Recovery from Distribution Transformers

Project Incharge : Dr. Manjula G. Nair

Drainage Power Recovery from Distribution Transformers

The objective of the work is the implementation of a scheme for recovering and utilizing the drainage power which is usually wasted due to circulating harmonics in the delta winding of a distribution transformer. This is achieved by developing a new three-winding (YYD_utilized) distribution transformer configuration which effectively recovers the trapped circulating harmonic power in the delta winding so as to improve the operational efficiency of the transformer. The result of the experiments conducted on a prototype 3 kVA transformer show that it is possible to recover nearly 3% of load power (which is otherwise lost as circulating harmonics), when supplying usual non- linear loads. A scheme for effective and controlled utilization of maximum available drainage power without compromising system power quality is developed. A controller is implemented for maximum power point tracking of the filtered, ripple-free drainage power for storing in a battery for further use. It is found that the maximum power extraction not only improves transformer efficiency but also improves system power quality. A few applications/situations where controlled utilization of drainage power is possible were also analyzed. The first application proposed is the use of drainage power for street lighting of the nearby locality of the transformer. The scheme has been simulated and a hardware prototype has been implemented and tested. Another proposal is a scheme for the use of battery stored drainage power for the dc link voltage regulation in a shunt active filter used for power quality improvement. The fluctuations in the dc link capacitor voltage of the filter, when in operation, are compensated using the recovered drainage power. A new controller named as, “IcosΦ controller for shunt active filter with drainage power support” is developed for generating reference currents for the filter. The scheme is tested in simulation environment and a prototype hardware model is implemented.

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