Publication

Abstract : Fifth-Generation (5G) New Radio (NR) relies on distinct channel interleavers for data and control channels to effectively mitigate burst errors. However, implementing these interleavers individually leads to a substantial increase in silicon cost. To address this challenge and optimize resource utilization while enhancing system performance, a novel Resource Sharing Channel Interleaver (RSCI) architecture for data and control channels in 5G NR is proposed. The RSCI is built upon a straightforward algorithm based on the 3rd Generation Partnership Project (3GPP) Release 15 (R15) standard for 5G NR and is implemented using Xilinx design suite on the Virtex 7 (XC7VX330T) Field Programmable Gate Array (FPGA). The presented RSCI demonstrates remarkable improvements over existing architectures. Specifically, it achieves a reduction in resource utilization by 20% and a cutback in power consumption by 19.2% compared to the existing architecture. To highlight the cost-effectiveness of the proposed approach, both interleavers are implemented as separate entities. Synthesis results indicate that the separate implementation occupies nearly double the resources compared to the combined interleaver implementation.