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Publication Type : Journal Article
Publisher : International Journal of Research in Engineering and Technology (IJRET)
Source : International Journal of Research in Engineering and Technology (IJRET), Volume 3, Issue 24, p.1-5 (2014)
Url : http://esatjournals.net/ijret/2014v03/i24/IJRET20140324001.pdf
Keywords : logarithmic amplifier, MOSFET, Parallel Summation Logarithmic amplifier, Saturation, WeakInversion
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Year : 2014
Abstract : Logarithmic amplifier is used for reducing the dynamic range of the input signal. Logarithmic amplifier is implemented using two different techniques. One of the methods is a parallel summation based method and the other one is a weak inversion based method. In parallel summation based method the transistors are maintained in saturation whereas in weak inversion based method the transistors are maintained in weak inversion. Both methods are simulated in 50nm CMOS technology using HSPICE. Considering power, area and dynamic range weak inversion method is more efficient compared to parallel summation method.
Cite this Research Publication : N. M. N. Kayalvizhi, “Comparison of Parallel Summation and Weak Inversion Based Logarithmic Amplifier”, International Journal of Research in Engineering and Technology (IJRET), vol. 3, no. 24, pp. 1-5, 2014.