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Design of programmable JTAG controller in FPGA

Publication Type : Journal Article

Publisher : Elsevier

Source : International Journal of Applied Engineering ResearchVolume 10, Issue 11, Pages 29621 - 296302015

Url : https://www.scopus.com/record/display.uri?eid=2-s2.0-84937826590&origin=resultslist&sort=plf-f

Campus : Amritapuri

School : School of Engineering

Department : Electronics and Communication

Year : 2015

Abstract : JTAG is one of the most powerful structured DFT technique used in VLSI industry that provides testing and debugging at chip, board level and system level. Besides testing, it can be utilized for some other non-testing purposes such as providing access to the internal components of the device. JTAG controller becomes the integral part of every VLSI IC chip. Here a programmable JTAG controller is proposed and implemented in FPGA. This scheme is employed in all the benchmark circuits of ISCAS_89 design and their performances were evaluated. All the designs are coded in verilog and simulated in Model sim DE 6.5e and synthesized in Xilinx Virtex-5 FPGA technology.

Cite this Research Publication : Kannan, Saranya K, Bhakthavatchalu, Ramesh " Design of programmable JTAG controller in FPGA", International Journal of Applied Engineering ResearchVolume 10, Issue 11, Pages 29621 - 296302015

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