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Publication Type : Conference Paper
Publisher : 2012 IEEE 10th International New Circuits and Systems Conference, NEWCAS 2012
Source : 2012 IEEE 10th International New Circuits and Systems Conference, NEWCAS 2012, Montreal, QC, p.249-252 (2012)
ISBN : 9781467308595
Keywords : CMOS integrated circuits, CMOS technology, Double sampling, Error feedback, First order, High-gain, Nanometer CMOS, Noise-shaping, Op amps, Output swing, Reference buffers, Sample rate, Topology
Campus : Amritapuri
School : School of Engineering
Department : Electronics and Communication
Year : 2012, 2014
Abstract : pA first order error feedback based noise shaping in a double sampled ADC is proposed. This topology is ideal for nanometer CMOS technology, as it obviates the need for high-gain and high output-swing op amps and fast-settling, power-hungry, and noisy reference buffers. Using a one stage op amp with a gain of 70 (i.e. 37 dB) and output swing of ±75 mV , this topology, realized in GPDK 90-nm CMOS technology, achieves an SNDR of 60 dB operating at 1 GHz (effective sample rate of 2 GHz due to double sampling) with an OSR of 32. © 2012 IEEE./p
Cite this Research Publication : V. Sarma and Sahoo, B., “Error feedback based noise shaping in a double sampled ADC”, in 2012 IEEE 10th International New Circuits and Systems Conference, NEWCAS 2012, Montreal, QC, 2012, pp. 249-252.