Publication

Abstract : The growing need for real-time, low-latency tick eting solutions for transportation and public infrastructure has pushed the trend towards embedded hardware-accelerated so lutions away from software-based ones. Traditional approaches involving microcontrollers and basic logic tend to encounter challenges such as processing delays, limited parallelism and limited scalability issues under high user loads. To address these shortcomings, this paper introduces an FPGA-based ticketing system implemented using Verilog HDL and Finite State Machine (FSM) design. Unlike past methods, the system proposed here includes modular architecture, noise-tolerant input management, and an organized real-time display system, which makes it a more appropriate choice for high-performance, embedded automation. Simulation and hardware testing ensure its adaptability and responsiveness, showing a more efficient, scalable alternative ticketing architecture.