Publication Type : Conference Proceedings
Publisher : INDICON
Source : INDICON 2006, India Conference, 2006 Annual IEEE, AMALTAS, India Habitat Centre, New Delhi (2006)
Url : https://ieeexplore.ieee.org/document/4086273
Campus : Coimbatore
School : School of Engineering
Department : Electronics and Communication
Year : 2006
Abstract : Digital images can be represented by rectangular pixel grid model. Yet an alternate model paradigm using a hexagonal pixel grid can be used to discretize and process images which are more suitable for computer vision modeling. The merits of using hexagonal lattice are superior symmetry, definite neighborhood and fewer samples are needed compared to a rectangular lattice. This paper elucidates the sub sampling procedure needed to obtain the hexagonally sampled image from the conventional rectangularly sampled image. Two image processing operations namely edge detection and image skeletonization were done on hexagonal lattice and also rectangular lattice for comparison. The algorithm used for the edge detection of sub sampled images is based on CLAP (cellular logic array processor) algorithm. Image Skeletonization was done using iterative thinning method which is better suited for VLSI Implementation. The paper further deals with the design and implementation of a cellular processor array (CPA) that executes binary image skeletonization on a hexagonal lattice. The implementation shows better results compared to the existing methods
Cite this Research Publication : S. Veni, Narayanankutty, K. A., and Senthilnayaki, M., “Hexagonal Pixel Grid Modeling for Edge Detection and Design of Cellular Architecture for Binary Image Skeletonization”, INDICON 2006. India Conference, 2006 Annual IEEE, AMALTAS, India Habitat Centre, New Delhi, 2006.