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Implementation of FIR Filter and MAC Unit by using Neural Networks in FPGA

Publication Type : Conference Paper

Publisher : Symposium on VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018)

Source : ymposium on VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018), PES Institute of Technology, Bengaluru, South Campus, India, 2018.

Campus : Bengaluru

School : School of Engineering

Department : Electronics and Communication

Year : 2018

Abstract :

Cite this Research Publication : A. Chauhan and P. Sathish Kumar, “Implementation of FIR Filter and MAC Unit by using Neural Networks in FPGA”, in Symposium on VLSI Design and Embedded Computing (VDEC’18), co-affiliated with Seventh International Conference on Advances in Computing, Communications and Informatics (ICACCI-2018), PES Institute of Technology, Bengaluru, South Campus, India, 2018.

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