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Single Event Upset In a 3-Bit SAR ADC

Publication Type : Conference Paper

Publisher : National Conference on Research Challenges in VLSI Design and embedded Systems for Wireless Communication

Source : International Conference on Communication and Signal Processing, pp.246-250,April 2014.

Campus : Bengaluru

School : School of Engineering

Department : Electronics and Communication

Verified : No

Year : 2016

Abstract :

Cite this Research Publication : Ananda Padmanaban M, Maran Ponnambalam and Premanand V. Chandramani, Member, IEEE “Design and Implementation of Two Stage 5-Bit Pipelined SAR ADC” International Conference on Communication and Signal Processing, pp.246-250,April 2014.

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