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Statistics

50+

50+

Patents
20192

20192

Books
12000

12000

Book
Chapters
4219

4219

Journal
Publications /
Scopus Indexed
216

216

Conference
Proceedings
9281

9281

Other
Publications
Publications
Understanding of On-Chip Power Supply Noise: Suppression Methodologies and Challenges

Authors : Dr. Pritam Bhattacharjee, Prerna Rana; Alak Majumder

Publisher :Recent Trends in Communication Networks, IntechOpen, (WoS/Book SCI),

Publications
VLSI Transistor and Interconnect Scaling Overview

Authors : Dr. Pritam Bhattacharjee, Arindam Sadhu

Publisher :Journal of Electronic Design Technology

Publications
Methodology of Standard Cell Library Design in .LIB Format

Authors : Dr. Pritam Bhattacharjee, Arindam Sadhu;

Publisher :Journal of VLSI Design Tool & Technology,

Publications
Performance Estimation of VLSI Design

Authors : Dr. Pritam Bhattacharjee, Arindam Sadhu; Sabnam Koley

Publisher :Journal of VLSI Design Tools and Technology

Publications
Implementation of ternary logic in QCA using SPICE macro-modeling

Authors : Dr. Pritam Bhattacharjee, Arijit Dey; Kunal Das; Swarnendu Kumar Chakraborty; Rajat Subhra Goswami

Publisher :Journal of Engineering Technology (SCIE/Scopus), American Society for Engineering Education,

Publications
SPICE Modeling of LDMOSFET Transistor

Authors : Dr. Pritam Bhattacharjee

Publisher :Journal of Semiconductor Devices and Circuits ISSN: 2455-3379, STM Journals

Publications
SPICE modeling for Metal Island Charged Confined Cellular Automata

Authors : Dr. Pritam Bhattacharjee, Kunal Das

Publisher :Journal of Computational and Theoretical Nanoscience (Scopus)

Publications
Estimation of Power Dissipation in Ternary Quantum Dot Cellular Automata Cell

Authors : Dr. Pritam Bhattacharjee, Kunal Das; Arijit Dey; Debashis De; Swarnendu Kumar Chakraborty

Publisher :Journal of Low Power Electronics (ESCI/Scopus), American Scientific Publishers

Publications
A 23.52µW / 0.7V Multi-stage Flip-flop Architecture Steered by a LECTOR-based Gated Clock

Authors : Dr. Pritam Bhattacharjee, Alak Majumder; Bipasha Nath

Publisher :IEIE Transactions on Smart Processing and Computing (Scopus)

Publications
Variation aware intuitive clock gating to mitigate on-chip power supply noise

Authors : Dr. Pritam Bhattacharjee, Alak Majumder;

Publisher :International Journal of Electronics (SCI/SCIE/Scopus)

Publications
A Novel Gating Approach to Alleviate Power and Ground Noise in Silicon Chips

Authors : Dr. Pritam Bhattacharjee, Alak Majumder; Tushar Dhabal Das

Publisher :Journal of Circuits, Systems and Computers (SCIE/Scopus),

Publications
A Variation-Aware Robust Gated Flip-Flop for Power-Constrained FSM Application

Authors : Dr. Pritam Bhattacharjee, Alak Majumder

Publisher :Journal of Circuits, Systems and Computers (SCIE/Scopus)

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