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Course Detail

Course Name GPU Architecture and Programming
Course Code 25ES641
Program M. Tech. in Embedded Systems
Credits 3
Campus Bengaluru, Coimbatore

Syllabus

Syllabus

Review of Traditional Computer Architecture Basic five stage RISC Pipeline, Cache Memory, Register File, SIMD instructions, GPU architectures – Streaming Multi Processors, Cache Hierarchy, The Graphics Pipeline, Introduction to CUDA programming. Multi-dimensional mapping of dataspace, Synchronization, Warp Scheduling, Divergence, Memory Access Coalescing, Optimization examples: optimizing Reduction Kernels, Optimization examples: Kernel Fusion, Thread and Block. OpenCL basics, OpenCL for Heterogeneous Computing, Application Design: Efficient Neural Network Training/Inferencing.

Text Books / References
  1. Jason Sanders and Edward Kandrot, “CUDA by Example: An Introduction to General-Purpose GPU Programming”, Addison-Wesley, 1st edition, 2010. 
  2. Benedict Gaster,Lee Howes, David R. Kaeli, “Heterogeneous Computing with OpenCL”,Morgan Kaufmann; 1st edition, 2011. 
  3. David Kirk and Wen-meiHwu, “Programming Massively Parallel Processors”, Morgan Kaufmann, 3rd edition, 2010. 
  4. John L.Hennessy and David A. Patterson, “Computer Architecture — A Quantitative Approach”, Morgan Kaufmann, 5th edition, 2011. 

Objectives and Outcomes

Pre-requisite: Nil

Course Objectives:

  • To introduce modern computer architectures, including RISC pipelines, GPU structures, and CUDA programming basics.
  • To develop skills in GPU optimization techniques, including memory coalescing, synchronization, and efficient kernel design.
  • To provide an understanding of OpenCL for heterogeneous computing and its application in neural network training and inference.

Course Outcomes:

CO1:

Understand the fundamentals of parallel programming. 

CO2:

Familiarise the various OpenCL device architectures. 

CO3:

Analyse OpenCL case studies. 

CO4:

Develop an application using GPU. 

CO-PO Mapping

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CO1

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CO4

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