Publication

Abstract : Assistive communication technology plays a critical role in improving the quality of life for individuals with motor and neuromuscular disabilities, including conditions such as Amyotrophic Lateral Sclerosis (ALS) and Multiple Sclerosis. However, most current hardware implementations rely on multistage processing pipelines that significantly increase area utilization, power consumption, and communication latency. This work presents the design and implementation of an extremely resource-efficient, low-power, and optimized Morse code decoder for use in real-time assistive communication systems. Conventional designs typically implement independent stages for signal acquisition, symbol classification, and ASCII character matching, which increases architectural complexity and hardware overhead. The proposed system consolidates these functions into a unified single-stage finite state machine (FSM), enabling simultaneous signal acquisition, timing analysis, and character generation. A 19-bit DSP-based counter, clocked at 100 MHz and producing a 5.24 ms timing quantum, accurately distinguishes dots from dashes without requiring any external debouncing circuits. The decoder is validated on two FPGA platforms: the Xilinx Virtex-5 XC5VLX50T and the Digilent Basys-3 (Artix-7). On the Virtex-5, the proposed design reduces LUT usage by 23% and register usage by 35% compared to the reference architecture, with a total power consumption of 0.454 W. The Basys-3 implementation achieves even greater efficiency, reducing LUT usage by 44% and register usage by 57%, with a total power of just 0.077 W. Both implementations occupy less than 1% of the available device resources, confirming the design's scalability and portability. The experimental results demonstrate that this single-switch Morse decoder is an efficient, low-latency, and portable communication interface well-suited for next-generation assistive technologies for motor-disabled individuals.