Publication Type : Journal Article
Publisher : River Publishers
Source : Journal of Mobile Multimedia
Url : https://doi.org/10.13052/jmm1550-4646.213410
Campus : Chennai
School : School of Engineering
Department : Electronics and Communication
Year : 2025
Abstract : A Verilog-based EVM on a Zynq Board that may enhance the security, reliability, and transparency of voting will be designed and developed. Using the Zynq System-on-Chip platform, it contains an integrative on-chip structure of ARM processor and FPGA fabric, thereby providing robust hardware for processing votes with minimal errors. This HDL called Verilog will be used to program the vote counting logic, results to be displayed, and user interaction. The system has several security layers – voter authentication and validation of votes – which therefore ensures integrity. It also supports multiple candidates and can accommodate real-time updates of votes displayed. The programmable nature of the Zynq platform allows it to be scaled and adapted for future use in different types and configurations of elections. In addition, the hardware implementation utilized here reduces tampering and unauthorized access threats, one of the major concerns when doing procedures in an election. Testing and simulation results confirm that the system is accurate and can perform according to the standards set up. The project will stress the efficient application of embedded systems and digital design to real-world applications, especially mission-critical areas like voting.
Cite this Research Publication : Lekkala Chetan Harsha, Sita Devi Bharatula, B. Naresh Kumar Reddy, K. Sarangam, Design and Implementation of a Secure and Accurate Electronic Voting Machine Using Verilog on Zynq FPGA, Journal of Mobile Multimedia, River Publishers, 2025, https://doi.org/10.13052/jmm1550-4646.213410