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Design and implementation of high speed brauns multiplier for low power applications

Publication Type : Patents

Url : https://www.quickcompany.in/patents/design-and-implementation-of-high-speed-brauns-multiplier-for-low-power-applications

Campus : Amaravati

School : School of Engineering

Verified : No

Year : 2022

Abstract : A binary multiplier circuit which is used in digital electronics, such as a computer, to multiply two binary numbers is proposed using binary adders. A variety of computer arithmetic techniques can be used to implement a digital multiplier. A binary multiplier is a combinational logic circuit used in digital systems to perform the multiplication of two binary numbers. These are most commonly used in various applications especially in the field of digital signal processing to perform the various algorithms. Unsigned array multipliers are also known as Braun multipliers or Carry Save Array Multipliers. This multiplier is restricted to perform multiplication of two unsigned numbers. A double multiplier circuit which is utilized in advanced hardware, such as a computer, to increase two double numbers is built utilizing double adders. Unsigned cluster multipliers are moreover known as Braun multipliers or Carry Spare Cluster Multipliers.

Cite this Research Publication : Published a Patent “Design and implementation of high speed brauns multiplier for low power applications” on March 2022, Application Number : 202241013493

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