Publication

Abstract : The article proposes an adaptive-based LFSR. The circuit is controlled by correlation control, which allows the circuit to work on different application that requires pattern correlations. The design is a combination of 3T-LFSR, that reduces output vector transition by 65 %, which is implemented by a characteristic methodology that enforces low signal 0 's at location preceding to the register switching of differing bits. It also incorporates a 2D LFSR using which cryptographically safe sequences can be produced. The result of the design was compared with the result obtained with the assistance of the traditional LFSRs ensured that it produces secure sequences without compromising its quality in reduction of power dissipation. This is perfectly suitable for application in low power testing as it works in two conditions which is capable of reducing power and increased security. The circuit is also flexible as the user can select the seed value and is parameterizable. Using multiple polynomials 9, 18, 27- bit LFSR's were simulated and validated through Xilinx vivado.