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Publication Type : Conference Paper
Publisher : Proceedings - 2011 Annual IEEE India Conference: Engineering Sustainable Solutions, INDICON-2011
Source : Proceedings - 2011 Annual IEEE India Conference: Engineering Sustainable Solutions, INDICON-2011, Hyderabad (2011)
Keywords : Data slots, Fast Fourier transforms, FFT/IFFT, FPGA boards, IFFT, Input datas, Inverse fast Fourier transforms, OFDM systems, OFDM transceiver, Orthogonal frequency division multiplexing, Processing rates, Radix 2, System complexity, Telecommunication systems, Transceiver system
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2011
Abstract : Inverse Fast Fourier Transform/ Fast Fourier Transform (IFFT/FFT) processors are crucial blocks for an Orthogonal Frequency Division Multiplexing (OFDM) transceiver system. However, in the current OFDM systems, the system complexity and processing rate do not vary adaptively with the input data. In this paper, we propose a novel IFFT/FFT architecture for the OFDM Transceiver system that exploits the correlation between bytes of incoming information to adaptively choose between the Radix-2 and Radix - 4 algorithm. Using this architecture, we have achieved additional free data slots per frame. The transceiver system has been tested end-to-end and implemented on FPGA Board. © 2011 IEEE.
Cite this Research Publication : L. M. Rajeswari and Manocha, S. K., “Design of data adaptive IFFT/FFT block for OFDM system”, in Proceedings - 2011 Annual IEEE India Conference: Engineering Sustainable Solutions, INDICON-2011, Hyderabad, 2011.