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Publication Type : Conference Proceedings
Publisher : 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech)
Source : 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech), IEEE, Kolkata, India (2020)
Campus : Bengaluru
School : School of Engineering
Department : Electronics and Communication
Year : 2020
Abstract : In tolerating errors there is the compaction of energy consumption and quality output will be get rid by approximate addition. The Data compression in images is the operation involves in the image compression. In this paper, a new architecture is introduced for the Non-Zeroing Bit Truncation method using XOR MUX Full adder. We are implementing this method in an application of image compression using the DCT method. We are calculating PSNR and MED Values for a compressed image using the proposed method which has acquired good improved values. This proposed work will introduce an approximate addition to using Truncation. Implementation of bit truncation in Image processing using the DCT concept. When comparing with the other methods of a Non zero bit truncation, the proposed method obtained good output values in terms of Area, Power, and Delay for 8bit, 16bit, 32bit, 64bit. The Proposed approach is simulated in Xilinx Vivado and implemented in Cadence RTL encounter to obtain Area, Power, and Delay. The DCT method for RGB and Gray Scale image is implemented using Matlab to calculate the PSNR and MED metrics.
Cite this Research Publication : B. Shyam and V. Vignesh, “Image Quality Compression Based on Non-Zeroing Bit Truncation using Discrete Cosine Transform”, 2020 4th International Conference on Electronics, Materials Engineering Nano-Technology (IEMENTech). IEEE, Kolkata, India, 2020.