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Low power systolic array based digital filter for DSP applications

Publication Type : Journal Article

Publisher : Hindawi Publishing Corporation

Source : Scientific World Journal, Hindawi Publishing Corporation, Volume 2015, p.1-6 (2015)

Url : http://www.scopus.com/inward/record.url?eid=2-s2.0-84928242178&partnerID=40&md5=931532b97cd1486328fee1cd5c4e937d

Campus : Coimbatore

School : School of Engineering

Department : Electronics and Communication

Year : 2015

Abstract : Main concepts in DSP include filtering, averaging, modulating, and correlating the signals in digital form to estimate characteristic parameter of a signal into a desirable form. This paper presents a brief concept of low power datapath impact for Digital Signal Processing (DSP) based biomedical application. Systolic array based digital filter used in signal processing of electrocardiogram analysis is presented with datapath architectural innovations in low power consumption perspective. Implementation was done with ASIC design methodology using TSMC 65 nm technological library node. The proposed systolic array filter has reduced leakage power up to 8.5% than the existing filter architectures. © 2015 S. Karthick et al.

Cite this Research Publication : S. Karthick, Valarmathy, S., and Prabhu E., “Low power systolic array based digital filter for DSP applications”, Scientific World Journal, vol. 2015, pp. 1-6, 2015.

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