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Publications
Methodology of Standard Cell Library Design in .LIB Format

Authors : Arindam Sadhu; , Dr. Pritam Bhattacharjee

Publisher : Journal of VLSI Design Tool & Technology,

Publications
A Hybrid Algorithm for Optimized Resource Allocation under Constrained Task Schedule

Authors : M. Pugalia;, Swaminathan J., A. Ashok;

Publisher : 2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC), IEEE,

Publications
Implementation of ternary logic in QCA using SPICE macro-modeling

Authors : Dr. Pritam Bhattacharjee;, Arijit Dey; , Rajat Subhra Goswami, Swarnendu Kumar Chakraborty; , Kunal Das;

Publisher : Journal of Engineering Technology (SCIE/Scopus), American Society for Engineering Education,

Publications
A 23.52µW / 0.7V Multi-stage Flip-flop Architecture Steered by a LECTOR-based Gated Clock

Authors : Dr. Pritam Bhattacharjee;, Bipasha Nath, Alak Majumder

Publisher : IEIE Transactions on Smart Processing and Computing (Scopus)

Publications
VLSI Transistor and Interconnect Scaling Overview

Authors : Dr. Pritam Bhattacharjee;, Arindam Sadhu

Publisher : Journal of Electronic Design Technology

Publications
Performance Estimation of VLSI Design

Authors : Arindam Sadhu; , Arindam Sadhu; , Sabnam Koley, Sabnam Koley, Dr. Pritam Bhattacharjee; , Dr. Pritam Bhattacharjee;

Publisher : Journal of VLSI Design Tools and Technology

Publications
Voltage Keeper Based Robust Flip Flop For Low Power Applications, Indian Patent File Application No. (Kolkata, India): 201731044358

Authors : Dr. Pritam Bhattacharjee; , Bipasha Nath, Alak Majumder

Publisher : Kolkata, India (2017)

Publications
A Variation-Aware Robust Gated Flip-Flop for Power-Constrained FSM Application

Authors : Dr. Pritam Bhattacharjee, Alak Majumder

Publisher : Journal of Circuits, Systems and Computers (SCIE/Scopus)

Publications
Variation aware intuitive clock gating to mitigate on-chip power supply noise

Authors : Dr. Pritam Bhattacharjee, Alak Majumder;

Publisher : International Journal of Electronics (SCI/SCIE/Scopus)

Publications
Estimation of Power Dissipation in Ternary Quantum Dot Cellular Automata Cell

Authors : Dr. Pritam Bhattacharjee; , Swarnendu Kumar Chakraborty, Debashis De; , Kunal Das; , Arijit Dey;

Publisher : Journal of Low Power Electronics (ESCI/Scopus), American Scientific Publishers

Publications
SPICE Modeling and Analysis for Metal Island Ternary QCA Logic Device

Authors : Dr. Pritam Bhattacharjee, Debashis De, Mallika De;, Kunal Das

Publisher : Information Systems Design and Intelligent Applications (Scopus), Springer India,

Publications
SPICE Modeling of LDMOSFET Transistor

Authors : Dr. Pritam Bhattacharjee

Publisher : Journal of Semiconductor Devices and Circuits ISSN: 2455-3379, STM Journals

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