The Department of Electronics and Communication Engineering, School of Engineering, Amrita Vishwa Vidyapeetham, Bengaluru, is organizing the 2026 IEEE 6th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), which will be held on June 12-13, 2026.
The Very Large-Scale Integration Systems Architecture, Technology and Applications (VLSI SATA) Conference was established to foster knowledge creation, engineering education, research, and development, while enabling effective networking among researchers and practitioners. The conference also focuses on identifying emerging research groups and promoting collaborative opportunities. Conceived in 2015, the inaugural edition and the subsequent 2016, 2022, 2024, and 2025 editions were successfully published.

February 28, 2026
Paper Submission Dead Line
April 12, 2026
Notification of Acceptance
April 30, 2026
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The conference themes for intersection includes but are not limited to Conference Themes
The VLSI SATA (Systems Architecture, Technology, and Applications) Conference is a premier international forum in the areas of VLSI systems, architectures, design technologies, and emerging applications. The conference was conceived to promote knowledge creation, engineering education, research and development, and to foster collaboration among academia, industry, and research organizations. Since its inception in 2015, VLSI SATA has been successfully organized across multiple editions, establishing itself as a vibrant platform for technical exchange and networking.
The VLSI SATA Conference 2026, 6th Edition will be organized by Amrita Vishwa Vidyapeetham, Bengaluru, a NAAC A++ accredited multi-campus university known for academic excellence and socially driven research, a center of excellence in engineering education and research with strong industry collaboration and will be held as an in-person event from 12-13 June, 2026.
VLSI SATA will serve as a common platform for researchers from academia and industry, postgraduate and doctoral students, technology developers, and policy makers, enabling meaningful discussions, collaboration opportunities, and the dissemination of cutting-edge research outcomes.
Authors are required to strictly follow the guidelines below when submitting manuscripts to Microsoft CMT 2026:
All submitted papers will undergo a peer-review process. The conference program will include peer-reviewed technical paper presentations, keynote and invited talks by eminent researchers, tutorials, workshops on emerging research themes, industry sessions, and technology demonstrations. The paper submission and review process will be managed through Microsoft CMT services, and the conference proceedings will be published through IEEE Xplore publisher.
All submissions need to be submitted through the CMT using the link:
https://cmt3.research.microsoft.com/VLSISATA2026/Submission/Index
Important Notice:All manuscripts must be submitted through: https://cmt3.research.microsoft.com/VLSISATA2026/Submission/Index
Authors are advised to use the official submission link and adhere strictly to the conference deadlines once the portal is opened.
| Category | Authors (Regular – Single Author / Paper) | Attendees / Listeners | ||||
|---|---|---|---|---|---|---|
| Indian | Foreigners | Indian (1 Day) | Indian (2 Days) | Foreigners (1 Day) | Foreigners (2 Days) | |
| IEEE CAS Member | 6,750 INR | 160 $ | 1,000 INR | 2,000 INR | 100 $ | 200 $ |
| IEEE Member | 7,500 INR | 170 $ | 1,200 INR | 2,500 INR | 100 $ | 200 $ |
| Non-IEEE Member | 8,500 INR | 195 $ | 1,500 INR | 3,000 INR | 145 $ | 290 $ |
| Additional Paper Submission by the Same Author: 50% of the author registration fee based on the category per paper. | ||||||
Email ID: vlsisata2026.amrita@gmail.com